1. Field of the Invention
The present invention relates to a memory card device which is detachably connected to a host apparatus, and a memory card control method for controlling that device.
2. Description of the Related Art
In recent years, digital devices have been developed extensively along with the digitization of contents data such as audio and video data. Most of these digital devices comprise storage devices such as a compact disk drive, hard disk drive, and the like so as to record contents data.
Recently, digital devices have been downsized and, for example, as a digital device such as a music player, a product having a main body size of several cm2 is commercially available. In such compact digital devices, recording media must also be downsized. As compact recording media, memory cards which incorporate nonvolatile semiconductor memories have received a lot of attention.
As one type of such memory cards, a memory card having a copyright protection function is known. Jpn. Pat. Appln. KOKAI Publication No. 2000-357126 discloses a memory card which has a revocation function of revoking illicit devices as the copyright protection function.
An SD (Secure Digital) memory card has a copyright protection function, and incorporates a NAND flash EEPROM. The NAND flash EEPROM is one type of nonvolatile semiconductor memories, and is electrically rewritable. The NAND flash EEPROM is categorized as flash memories. In a flash memory, a minimum area that can be erased per erase operation is specified as an erase block, and the data erase operation is always done for each of erase blocks. Therefore, a flash memory is suited to record large-capacity files rather than the random access purposes that involve frequent data update processes.
However, the SD memory card adopts an addressing method that designates an access position by bytes using a 32-bit memory address appended to each memory access command from a host apparatus (to be referred to a byte addressing method hereinafter). For this reason, the upper limit of the memory size of the SD memory card is limited to 232 bytes, i.e., 4 GB.
If an addressing method that designates an access position by blocks each of which is formed by combining a plurality of bytes (to be referred to as a block addressing method hereinafter) is used in place of the byte addressing method, a memory address space of 4 GB or more can be accessed even when the 32-bit memory address is used.
However, when the block addressing method is simply adopted, compatibility with existing host apparatuses which do not support the block addressing method cannot be maintained. That is, data groups which form one file may be written apart in a memory address space beyond 4 GB due to file fragmentation. In this situation, taking a memory card with a total memory size of 8 GB as an example, some data which form given file A are preset at positions within lower 4 GB in the 8 GB memory space, but the remaining data of that file A are present at positions within upper 4 GB. When data groups which form one file are scattered in the memory address space beyond 4 GB, an existing host apparatus which does not support the block addressing method but supports only the byte addressing method can no longer correctly read that file. This is because, the maximum memory space that can be accessed by the byte addressing method is 4 GB. Hence, a new mechanism for expanding the memory space of the memory card is demanded.